From AI-ready chips to AI-designed hardware: recent developments shaping Europe’s semiconductor ecosystem
Europe’s semiconductor landscape is increasingly being shaped by the close relationship between artificial intelligence and the technologies that underpin it. Two recent developments illustrate this dynamic from different perspectives: the Chips Joint Undertaking’s upcoming consultation on Chips for AI, AI for Chips, and the €200+ million Series A raised by Dutch semiconductor systems startup EUCLYD to develop more efficient infrastructure for AI.
Looking first at the policy and technology development side, the Chips Joint Undertaking (Chips JU) is preparing its 2027 Work Programme through an online consultation workshop taking place on 6 October 2026. The workshop will bring together stakeholders from across the Electronic Components and Systems community to discuss potential topics for the 2027 Calls, exchange views on industrial needs and technology priorities, and contribute to shaping future Chips JU actions.
The consultation is organised around three complementary areas: adaptive and autonomous systems across their full lifecycle, AI-driven chip design, and system-level memory architectures for AI. The latter two are particularly relevant to a challenge that is becoming increasingly important as AI workloads grow: improving not only computing capabilities, but also the way chips are designed and how computing resources interact with memory. Input from the workshop will contribute to the drafting of the Chips JU Work Programme 2027 and its call topics.
This focus on the interaction between AI and semiconductor architecture is also reflected in developments coming directly from Europe’s industrial ecosystem. EUCLYD, an Eindhoven-based semiconductor systems startup founded in 2024, has raised more than €200 million in Series A funding to accelerate the development of infrastructure for foundation AI models. The round was co-led by Samsung, Somerset Capital Partners, the EQT-managed Scaleup Europe Fund and Innovation Industries, with additional backing from EIFO, imec.xpand, the Brabant Development Agency (BOM) and Quadri.
EUCLYD is developing an infrastructure approach that combines custom compute silicon, memory architecture and data-centre systems, with the stated aim of addressing some of the compute, memory bandwidth and energy-efficiency constraints associated with increasingly demanding AI workloads. Its architecture combines programmable ASIC compute with processor-memory co-design and system-level optimisation.
The company’s new financing also brings a notable connection to Europe’s semiconductor equipment ecosystem: Peter Wennink, former President and CEO of ASML, has joined EUCLYD’s board as Chairman. The development highlights the growing importance of semiconductor systems and infrastructure alongside traditional chip manufacturing, particularly as AI increases demand for more efficient computing architectures.
Taken together, the two developments point to a semiconductor ecosystem in which AI is increasingly both a driver of chip innovation and a field in which semiconductor technologies themselves need to evolve. Chips JU’s consultation reflects this challenge at the level of European technology priorities, while EUCLYD provides a concrete example of a European company working on the compute, memory and system-level architecture required by next-generation AI workloads.
As AI workloads continue to place new demands on computing infrastructure, the ability to connect advances in chip design, memory architectures, compute efficiency and system integration will remain an important part of Europe’s semiconductor trajectory.
This will also be a key theme of the Industrial Alliance for Semiconductors meeting in Brussels on 4-5 November, where discussions will look at how Europe can strengthen its design capabilities, better connect semiconductor innovation with emerging AI and digital infrastructure needs, and turn technological strengths into concrete industrial opportunities. Register now.
